The recording of telemetry data streams transmitted via radio links from remote sensors is carried out for various purposes by utilities and government agencies. These streams can be in analogue form, in which information is encoded by modulation of a carrier, or by frequency shift keying (FSK), in which the data is used to change the frequency of a carrier.
The remote sensors generating such data streams often send data at rates which vary slightly from one sensor to another (plesio synchronous).
Recording data from a number of sensors, often including both analogue and digital data, requires preservation of the phase relationship between the sensor data streams whatever method of recording is used.
Traditionally, data streams from remote sensors have been recorded on longitudinal multi-track instrumentation recorders with each sensor assigned its own track. Typically these recorders have been configured with each track having associated electronics optimised for either analogue or digital data streams. Clearly an analogue sensor must be assigned to a track which has been optimised for analogue recording. Digital streams, however, have traditionally been recorded by generating an analogue representation of their current state as either a high or low voltage level.
There are advantages in recording digital as opposed to analogue data streams due to digital recorders generally being relatively low cost, requiring minimal or no maintenance or calibration, and the ease in which recorded data can be transferred from them into computers for analysis. However, as the above requirements for recording digital data streams indicate, it is not a simple task to make a digital plug-compatible equivalent of the above longitudinal multi-track instrumentation recorders.
One reason for this is that the output from a receiver of frequency shift keyed signals is just data, the clock required to process the data digitally not being available. In theory a clock can be regenerated from the data, but if the phase lock loop usually used by clock recovery devices is disturbed by noise, extra or missing clock transitions will be produced, and this will usually spoil the phase accuracy of this channel from then on. If the clock recovery device is only used during replay, a disturbance during replay may be overcome by repeating the replay. However, if the disturbance occurred during recording of the data, the data becomes irreparably damaged.
Instrumentation recorders do not need a clock and hence cannot suffer from these problems.
Since data from a plurality of digital sensors is generally plesio synchronous, complex packaging systems are required in order to record them and then make sense of the recorded data. One technique for effecting this is to accumulate data into packets of a size sufficient to accommodate the output of the fastest sensor. In writing the packets to a particular recording channel, a count of the actual content of the packet is appended to it, and this package count is used during replay to return only valid data. This data is usually stripped on a first in first out basis at a rate controlled by a variable oscillator, the oscillator being trimmed to keep the first in first out pointers constant. However, this introduces small phase errors. In addition it suffers with the problems associated with the clock recovery devices referred to above.
Direct digital recording could be effected by attempting to emulate a multi-track instrumentation recorder, received frequency shift keyed data being treated as an analogue signal and digitising it. In theory a 250 kilobit stream of pulses can be treated as being equivalent to an analogue signal with a frequency of 125 kHz, this being the frequency a 1010 sequence would produce. Sampling theory suggests that this stream could be sampled by 250 kilo samples. However, in practice a sampling rate of 125 kHz×2.5 would be required using anti-alias filters. Furthermore, such filters have the disadvantage that they impose a limit on the rate of change of originally sharp transitions, resulting inevitably in ringing caused by these sharp transitions.
It is also debatable as to whether clock recovery devices used with conventional instrumentation recorders will function correctly with the resulting degraded waveforms, thereby calling into question the ability to provide true plug-compatibility.
This problem would be greatly reduced if digital recording bandwidths were unlimited. However, the above techniques involve the consumption of 10 recording bits per data bit just to produce a less than perfect representation of the input signal.
There are further problems associated with using a computer to analyse digital data streams which have been recorded with a sample clock rate close to the Nyquist rate. Replayed waveforms are then only a close approximation to the input data due to the use of a reconstruction filter following the digital to analogue converter. If a plot were to be made of the data values returned to the digital to analogue converter, the peaks produced would be seriously displaced from their correct positions as a result of the asynchronous nature of the sample clock relative to the data. Clearly this would place a far greater burden on the analysing computer than a perfectly timed and square edged signal.
Another method might be to sample digital data streams using a clock running at, say, ten times the nominal bit rate of the data. This would then produce a digital representation of the waveform, but the edges of the waveform could be displaced from their true positions by up to 10%, placing additional burdens on the clock recovery device. In addition, ten bits do not fit conveniently into either computer bytes or words, which makes analysis by computer difficult. More samples would help, but this would be at the expense of recording duration.
Recorders for recording digital data are usually single channel devices, and recording multiple data channels on them (equivalent to multiple tracks) is usually effected using some form of time division. Since single channel devices only require a single data clock, it follows that if a time division multiplexer is attached to the input of such a recorder, its channel clocks must be related to its output clock. For example, if an eight channel time division multiplexer were to be attached to the input of an 8 Mbyte/sec capable recorder, each of the eight inputs to the time division multiplexer would be expected to source data at 1 Mbyte/sec, combining them sequentially producing an 8 Mbyte/sec stream.
If the time division multiplexer inputs come from analogue to digital converters there would be no problems because a single 8 Mhz source can be used to clock data from the time division multiplexer, and when divided by 8 it can be used as the clocks for the converter and for the input.
Time division is not the only possible multiplexing scheme. For example it would be possible to direct each of the eight input streams to a unique bit of a byte wide input.
Whichever method is used, it is clear that the time division multiplexer must receive data from each of the inputs at equal rates. Plesio synchronous data streams do not meet this requirement and so their rates have to be adjusted, for example as described above.
In summary, single channel digital recorders can be run from an external clock and multi-channel recorders employing multiplexing will then require all channels to run at the same rate.
Special time division multiplexers can be made which have fixed ratios between channels, for example three channels of 2 Mbyte/sec each and two channels of 1 Mbyte/sec each could be combined sequentially to produce a stream at 8 Mbyte/sec.